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CS61C

Canonical Form, CL Design

Learning Outcomes

  • Practice translating between the three representations for a combinational logic block: truth table, boolean expression, and gate diagram.
  • Practice using laws of Boolean Algebra.
  • Practice modular design: compose complex circuits using smaller circuits.

Our goal this lecture is to build combinational logic blocks. We can summarize this approach with the following diagram:

Diagram with three bubbles describing three representations of combinational logic: Truth Table, Boolean Expression, and Gate Diagram. The representations are connected with curved arrows showing conversions between them.

Second equivalent circuit: y=a+cy = a + c.

#fig-cl-block-representation shows the three possible representation for a combinational logic block.

  • The truth table form is unique—for every combinational logic block, there is only one truth table. The uniqueness of the truth table makes it a useful way to clearly define the function of a combinational logic block.
  • There are multiple Boolean expressions possible for any combinational logic block. Boolean expressions are useful for algebraic manipulation, particularly simplification.
  • Multiple gate level representations for any combinational logic blocks. The gate diagram gives us a prescription for converting to an actual transistor circuit; each gate in the diagram can be replaced by a small transistor circuit that achieves is respective gate level function.

This section discusses how to translate between the diferent representations of a combinational logic block. This section ends with how to compose circuits from smaller blocks.

Example: Majority Circuit

Consider the below equation. This describes a three-input majority circuit because the output y takes on the value that matches the majority of the input values.

y=ab+bc+acy = ab + bc + ac

Equation #eq-majority-circuit has the corresponding truth table

and has the corresponding gate circuit

Three two-input AND gates pairwise on a, b, and c feed a three-input OR gate to output y, implementing the majority function with a note on wire junctions.

Circuit corresponding to y=ab+bc+acy = ab + bc + ac.

The equation says that the output y is the OR (++) of three terms, where each term is the AND of two input variables (\cdot or concatenation). The correspondence between #eq-majority-circuit and the circuit in #fig-majority-circuit should be clear. The three product terms are implemented using AND gates and the final sum by the three input OR gate.

Canonical Form

Let’s go back to the truth table as our definition of a desired function. Starting from a truth table, by inspection, it is possible to write a Boolean expression that matches its behavior. The type of Boolean expression that we will write is called the “sum-of-products” canonical form.

The canonical form gets its name from the fact that it is formed by taking the sum (OR) of a set of terms, each term being a product (AND) of input variables or their complements.

  • Every place (row) where a 1 appears in the output, we will use a product (AND) term in the Boolean expression.
  • Each AND term includes all the input variables in either complemented or uncomplemented form.
  • A variable appears in complemented form if it is a 0 in the row of the truth table, and as a 1 if it appears as a 1 in the row.

Example: Truth Table \rightarrow Boolean Expression \rightarrow Gate Diagram

Any CL circuit that can be practically specified as a truth table can be represented with a Boolean expression by writing its canonical form. Following that, through algebraic manipulation, it can be simplified, then translated to a circuit of logic gates.

1. Use the truth table to build the canonical form. The canonical form equation has four product terms, one for each of the 1’s in the output yy.

y=abc+abc+abc+abcy = \overline{a} \overline{b} \overline{c} + \overline{a} \overline{b} c + a \overline{b} \overline{c} + a b \overline{c}

2. Simplify using Boolean Algebra laws, if needed.

y=abc+abc+abc+abcSum of Products=ab(c+c)+ac(b+b)Distributivity=ab(1)+ac(1)Inverse (OR) x+x=1=ab+acIdentity (AND) x1=x\begin{aligned} y &= \overline{a} \overline{b} \overline{c} + \overline{a} \overline{b} c + a \overline{b} \overline{c} + a b \overline{c} && \text{Sum of Products} \\ &= \overline{a} \overline{b} (\overline{c} + c) + a \overline{c} (\overline{b} + b) && \text{Distributivity} \\ &= \overline{a} \overline{b} (1) + a \overline{c} (1) && \text{Inverse (OR) } x + \overline{x} = 1 \\ &= \overline{a} \overline{b} + a \overline{c} && \text{Identity (AND) } x \cdot 1 = x \end{aligned}

3. Draw the gate diagram. The circuit specified by the canonical form is one of many circuits that implement the original 3-input function.

Sum-of-products style circuit: NOT gates on a, b, and c; one AND combines NOT a with NOT b, another AND combines a with NOT c; both outputs drive an OR gate to output y.

Circuit specified by canonical form in example.

Example: Simplify Circuits

Simplifying circuits involves taking a gate diagram and writing its Boolean expression, simplifying it, then translating back to a gate diagram.

Example: Verify Circuit (Majority Circuit, Revisited)

In our three-input majority circuit, we can use the truth table to build the canonical form:

y=abc+abc+abc+abcy = \overline{a}bc + a\overline{b}c + ab\overline{c} + abc

We can then use Boolean algebra to verify that the canonical form is equivalent to the intuitive majority circuit equation:

y=abc+abc+abc+abc=(abc+abc)+abc+abc+abcIdempotence: x=x+x=(a+a)bc+abc+abc+abcDistributivity=(1)bc+abc+abc+abcInverse (OR)=bc+(abc+abc)+abc+abcIdempotence (again)=bc+a(b+b)c+abc+abcDistributivity=bc+ac+ab(c+c)Distributivity=bc+ac+ab(1)Inverse (OR)=bc+ac+abSimplified Expression\begin{aligned} y &= \overline{a}bc + a\overline{b}c + ab\overline{c} + abc \\ &= (\overline{a}bc + abc) + a\overline{b}c + ab\overline{c} + abc && \text{Idempotence: } x = x + x \\ &= (\overline{a} + a)bc + a\overline{b}c + ab\overline{c} + abc && \text{Distributivity} \\ &= (1)bc + a\overline{b}c + ab\overline{c} + abc && \text{Inverse (OR)} \\ &= bc + (a\overline{b}c + abc) + ab\overline{c} + abc && \text{Idempotence (again)} \\ &= bc + a(\overline{b} + b)c + ab\overline{c} + abc && \text{Distributivity} \\ &= bc + ac + ab(\overline{c} + c) && \text{Distributivity} \\ &= bc + ac + ab(1) && \text{Inverse (OR)} \\ &= bc + ac + ab && \text{Simplified Expression} \end{aligned}

Example: Gate Diagram \rightarrow Truth Table

To generate a truth table from a given circuit, we just need to evaluate the output for all possible input combinations.

Truth Table:

aby
001
010
100
111

2-Bit Compare

After some thought, you may have realized that this combinational logic circuit can be described as a compare: Take two inputs and returns 1 if the two inputs are equal and 0 otherwise. We use this functionality in a later example.3

Composing Circuits: 32-Bit Comparator

We would like to a circuit that compares two 32-bit values; this 32-bit compare circuit can be used in our processor to implement the equality comparison for the RV32I instruction beq rs1 rs2 Label.

Block symbol with 32-bit slash buses for A and B entering the top of the block. A single output Z results from the block; the block interior shows equals with subscript 32 and a question mark, representing that the combinational logic checks for equality.

32-bit compare circuit.

We’d therefore like to use the 2-bit compare circuit we built in a previous example. We represent the circuit as a combinational logic block, as below. This block helps abstraction; any time you see the block in #fig-compare-2-block, know it is implemented as the circuit in #fig-compare-2-circuit.

Rectangular block with single-bit inputs a and b on top and output y below. An equals subscript of one with a question mark inside the block denotes a one-bit compare that checks for equality.

Bitwise compare circuit; a block representation of the mystery circuit in #fig-compare-2-circuit.

By way of comparison, for the 32-bit compare circuit(@fig-compare-32-block):

  • The value A is a 32-bit value, because of the wire bundle (the wire is marked with a notch). Similarly, value B is 32-bits.
  • The value z is a 1-bit value.

Functionally, z is 1 only if all of A’s bits are equal to all of B’s bits. In other words, we can perform 32 bitwise comparisons, then AND them together. The underlying circuit for our compare block is therefore as follows:

Thirty-two parallel one-bit equality blocks on paired inputs a31 b31 through a0 b0, all feeding a single 32-input AND gate whose output is z. The output z is high when every bit pair matches.

32-bit compare circuit diagram, assuming we have implemented the bitwise compare circuit. The 32-input AND gate can be implemented recursively with 2- or 4-input AND gates.

Footnotes

  1. In fact, “exactly” one, because input combinations are unique. In Sum-of-Products we opt for OR (instead of “XOR”) in order to simplify expressions with laws of Boolean Algebra.

  2. Notably, this circuit is not a NAND gate; we leave the proof to you. We suggest writing things out with truth tables.

  3. We note that the outputs of the two AND gates will never both be 1, so we could have replaced the OR gate with an XOR gate.